Current sub-90 nm copper interconnect technology suffers from a non-bamboo microstructure, i.e., a microstructure without bamboo-like features, in lines and vias. This leads to problems associated with copper diffusion such as electromigration and stress voiding.
Three different modes of copper diffusion are known. The first mode is copper diffusion along grain boundaries of a copper interconnect structure. The second mode is copper diffusion at a surface of a copper interconnect structure, i.e., at an interface at which the copper interconnect structure adjoins another material. The third mode is copper bulk diffusion through grains, i.e., across an interface at which two grain boundaries meet. Typically, the rate of diffusion is the highest for the first mode, and lowest for the third mode. Thus, it is advantageous to form a copper interconnect structure containing a metal line in which the metal line has a bamboo-like pattern in the grain microstructure, or a “bamboo microstructure.” In the bamboo microstructure, the lateral width of a grain is the same as the width of the metal line or the metal via. The length of the grain is greater than the width of the metal line so that grain boundaries look like a stalk of a bamboo plant with notched segmentation.
It is advantageous to have a bamboo microstructure where grains span the width and height of a line or via. The phenomenon of electromigration occurs when a current flowing in the line, due to an externally applied field, leads to a net drift of Cu ions in the direction of the electron flow. This drift eventually will lead to line failure due to loss of copper at divergent sites such as grain boundaries and material interfaces. Since electrical current flows along the direction of a metal line and any electromigration is forced to occur “through,” i.e., substantially perpendicular to the plane of, grain boundaries, the bamboo microstructure offers significantly more resistance to electromigration than non-bamboo microstructures. The bamboo microstructure essentially shuts down diffusion along grain boundaries, since bamboo grain boundaries are substantially at right angles to the current flow.
An alternative method of suppressing electromigration in a metal interconnect structure exists. It is well know that if the length of a metal line is less then the “Blech” length, copper ion motion will not occur, shutting down the electromigration process. Mechanical stress at lengths less than the “Blech” length opposes the drift of copper ions. A typical Blech length is on the order of 10 microns for present interconnect structures consisting of copper. While, in principle, designing all interconnect metal lines shorter than the “Blech” length would solve the problem, such a limitation puts a severe constraint on the design and layout of an interconnect structure, and practically renders such layouts impractical.
Thus, there exists a need for suppressing copper diffusion without resorting to use of a design rule stipulating that all metal interconnect lines be shorter than the “Blech” length. However, there are no currently known solutions for achieving a bamboo microstructure in sub-90 nm metal lines. Apparently, growth of the grain size is limited at the bottom of metal lines in fine featured metal interconnect structures employing copper.
Referring to FIG. 1, vertical cross-sectional view of an exemplary prior art interconnect structure comprises a dielectric layer 110, a barrier layer 120, a copper seed layer 130, and a plated copper layer 140. The dielectric layer 110 is typically formed on a semiconductor substrate (not shown) containing semiconductor devices (not shown). The dielectric layer 110 comprises a dielectric material. After formation of a via cavity and a line cavity within the dielectric layer 110 by lithographic patterning and etching, a barrier layer 120 is formed to prevent diffusion of contaminants into a metal via and a metal line to be subsequently formed, as well as to prevent the diffusion of metal into the dielectric layer 110, and to promote adhesion of the metal via and the metal line to the dielectric layer 110. The copper seed layer 130 is formed on the barrier layer 120, for example, by physical vapor deposition. The plated copper layer 140 is formed by plating on the copper seed layer 130. Typically, a superfill (bottom-up fill) process is employed to prevent formation of any seam in the metal via and the metal line.
The copper seed layer 130, as deposited, has a polycrystalline structure in which the average size of the grains is comparable with the thickness of the copper seed layer or less. Typically, the as-deposited copper seed layer 130 has an average grain size from about 2 nm to about 10 nm. The thickness of the copper seed layer 130 may be from about 5 nm to about 60 nm, and typically from about 10 nm to about 50 nm. The plated copper layer 140 has a microstructure in which the grain size is from about 5 nm to about 400 nm, and typically from about 10 nm to about 200 nm, although the grain size depends on the details of the plating process and may be less than or greater than the range indicated above.
Referring to FIG. 2, the exemplary prior art interconnect structure is subjected to a recrystallization process in which the grains in the copper seed layer 130 and the plated copper layer 140 grow. The recrystallization process typically employs an anneal at an elevated temperature. While the typical microstructure of a thin copper film, which has been annealed, has grain sizes 2-3 times the film thickness with a mixture of grain orientations, a bottom portion of a post-grain-growth copper layer 180 in a metal interconnect structure having fine features, e.g., features having a width less than 90 nm, contains small grains having a lesser dimension than the width of the metal interconnect structure. Typically, the dimensions of such small grains are about 2 to 4 times smaller than the width of the metal interconnect structure, i.e., the width of the metal line or the diameter of the via.
Referring to FIGS. 3A-3C, the post-grain-growth copper layer 180 is planarized to form a copper interconnect structure 190 so that a top surface of the copper interconnect structure 190 is substantially coplanar with a top surface of the dielectric layer 110. While the grain size near the top surface of the copper interconnect structure 190 may be about 2 to 3 times the width of the copper interconnect structure 190, the grain size near the bottom surface of the copper interconnect structure 190 is less than the width of the copper interconnect structure 190. Thus, despite an appearance of a bamboo microstructure as observed at a top surface of the copper interconnect structure 190, the copper interconnect structure 190 does not have a bamboo microstructure since the bottom portion of the copper interconnect structure 190 does not have large enough grains, and a bamboo-style segmentation between grain boundaries is not present in the exemplary prior art interconnect structure.
In view of the above, there exists a need for metal interconnect structure having fine features sizes such as sub-90 nm metal lines, i.e., metal lines having a width less than 90 nm, and containing a bamboo microstructure so that copper diffusion and associated problems may be avoided, and methods of forming such a metal interconnect structure.